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2014 System Level Design of Reconfigurable Server Farms Using Elliptic Curve Cryptography Processor Engines
Sangook Moon, Jongsu Park
J. Appl. Math. 2014: 1-8 (2014). DOI: 10.1155/2014/390176

Abstract

As today’s hardware architecture becomes more and more complicated, it is getting harder to modify or improve the microarchitecture of a design in register transfer level (RTL). Consequently, traditional methods we have used to develop a design are not capable of coping with complex designs. In this paper, we suggest a way of designing complex digital logic circuits with a soft and advanced type of SystemVerilog at an electronic system level. We apply the concept of design-and-reuse with a high level of abstraction to implement elliptic curve crypto-processor server farms. With the concept of the superior level of abstraction to the RTL used with the traditional HDL design, we successfully achieved the soft implementation of the crypto-processor server farms as well as robust test bench code with trivial effort in the same simulation environment. Otherwise, it could have required error-prone Verilog simulations for the hardware IPs and other time-consuming jobs such as C/SystemC verification for the software, sacrificing more time and effort. In the design of the elliptic curve cryptography processor engine, we propose a 3X faster GF(2m) serial multiplication architecture.

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Sangook Moon. Jongsu Park. "System Level Design of Reconfigurable Server Farms Using Elliptic Curve Cryptography Processor Engines." J. Appl. Math. 2014 1 - 8, 2014. https://doi.org/10.1155/2014/390176

Information

Published: 2014
First available in Project Euclid: 2 March 2015

Digital Object Identifier: 10.1155/2014/390176

Rights: Copyright © 2014 Hindawi

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