Journal of Symbolic Logic
- J. Symbolic Logic
- Volume 62, Issue 3 (1997), 981-998.
Lower Bounds for Resolution and Cutting Plane Proofs and Monotone Computations
We prove an exponential lower bound on the length of cutting plane proofs. The proof uses an extension of a lower bound for monotone circuits to circuits which compute with real numbers and use nondecreasing functions as gates. The latter result is of independent interest, since, in particular, it implies an exponential lower bound for some arithmetic circuits.
J. Symbolic Logic, Volume 62, Issue 3 (1997), 981-998.
First available in Project Euclid: 6 July 2007
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Pudlak, Pavel. Lower Bounds for Resolution and Cutting Plane Proofs and Monotone Computations. J. Symbolic Logic 62 (1997), no. 3, 981--998. https://projecteuclid.org/euclid.jsl/1183745308